At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Part of the rapidly expanding Hardware-Analytics and Test (HAT) business unit, a Silicon Validation engineer works on developing and implementing electrical validation strategy for our state-of-the-art PVT-sensor and SLM-monitor IPs. We are seeking an experienced, highly motivated and high-caliber individual to work on post-silicon and system level debug and characterization of various Sensor & Monitor IPs as part of HDG (Hardware Development Group) product portfolio.
Responsibilities:
Development of electrical and functional validation strategy for on-die monitoring solutions
Working with Hardware/IP teams to create test-plan and root cause Silicon issues
Develop and document electrical validation requirements and tests for verification of sensor IPs
Guiding more junior engineers and tracking their work
Yêu Cầu Công Việc
Requirements:
Using standard lab equipment for measurement and characterization
BS or MS degree in Electrical Engineering with 10+ years of relevant industry experience
Strong technical experience with Automatic Lab/Test equipment
Understanding of digital & analog circuits for device validation and testing
Excellent teamwork, communication, mentoring, and interpersonal skills with both internal teams and external team
Preferred skills:
ood understanding of device test methods and process test quality methodology – Gage R&R, Cp, Cpk etc.
A sound understanding of programming and operating of National Instruments LabVIEW software
Experience of using LabVIEW with NI FPGA, SMU, DMM and cross-point switch modules and control of non-NI equipment
Experience of using LabVIEW with SQL
Experience of using SAS JMP software for data analysis
Hands-on experience building a validation lab with test benches, power, internet, test equipment and more
Hands-on experience with board bring-up, hardware and software debugging experience
Drive post-silicon debug efforts to identify root cause and resolution
Working knowledge of lab equipment such as ATE, oscilloscopes, logic analyzers, and protocol analyzers
Knowledge and experience in JTAG and related IEEE test protocols
Experience with pre-post Si correlation
An understanding of statistical data analysis and silicon test data
PCB schematic capture using industry standard CAD tools, e.g. OrCad, Altium Designer or similar
Programming and scripting skills in Python, TCL and/or bash
Experience of using version controls systems, e.g. Git, Perforce for the control of data
